Memristor-Based In-Sensor Neuromorphic Computing for Ultra-Low-Power Edge Intelligence: A Simulated Hardware-Efficiency Study

This article presents a clearly labeled simulated empirical study spanning Electronics and Communication Engineering. A simulated edge-classification workload was mapped to conventional sensor-plus-MCU processing, analog memristive crossbar processing, and memristor-based in-sensor computing. Energy per inference, latency, memory movement, accuracy, device-to-device variation, endurance, and ADC/DAC overhead were modeled under four precision levels. The in-sensor neuromorphic configuration reduced simulated data-movement energy by 71% and total inference energy by 58% relative to the MCU baseline. Accuracy remained within 1.8 percentage points of the digital reference at moderate precision, but device variability above 8% produced a rapid decline unless calibration was enabled. All numerical observations and empirical outcomes are synthetic and are used for methodological illustration only. No real laboratory, bridge, enterprise, medical institution, patient cohort, or operating infrastructure was studied. The article combines current literature with a distinct analytical structure and topic-specific evidence to demonstrate how a future real-world investigation could be designed and reported.